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d a t a sh eet product speci?cation supersedes data of 2003 jun 17 2004 nov 11 integrated circuits 74hc4066; 74hct4066 quad bilateral switches
2004 nov 11 2 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 features very low on-resistance: C50 w (typical) at v cc = 4.5 v C45 w (typical) at v cc = 6.0 v C35 w (typical) at v cc = 9.0 v. complies with jedec standard no. 7a esd protection: hbm eia/jesd22-a114-b exceeds 2000 v mm eia/jesd22-a115-a exceeds 200 v. specified from - 40 c to +85 c and - 40 c to +125 c. general description the 74hc4066 and 74hct4066 are high-speed si-gate cmos devices and are pin compatible with the hef4066b. they are specified in compliance with jedec standard no. 7a. the 74hc4066 and 74hct4066 have four independent analog switches. each switch has two input/output pins (pins ny or nz) and an active high enable input pin (pin ne). when pin ne = low the belonging analog switch is turned off. the 74hc4066 and 74hct4066 are pin compatible with the 74hc4016 and 74hct4016 but exhibit a much lower on-resistance. in addition, the on-resistance is relatively constant over the full input signal range. quick reference data gnd = 0 v; t amb =25 c; t r =t f = 6 ns. notes 1. c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s [(c l +c s ) v cc 2 f o ] where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; c s = maximum switch capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; s [(c l +c s ) v cc 2 f o ] = sum of the outputs. 2. for 74hc4066 the condition is v i = gnd to v cc . for 74hct4066 the condition is v i = gnd to v cc - 1.5 v. symbol parameter conditions typical unit 74hc4066 74hct4066 t pzh /t pzl turn-on time ne to v os c l = 15 pf; r l =1k w ; v cc =5v1112ns t phz /t plz turn-off time ne to v os c l = 15 pf; r l =1k w ; v cc =5v1316ns c i input capacitance 3.5 3.5 pf c pd power dissipation capacitance per switch notes 1 and 2 11 12 pf c s maximum switch capacitance 88pf
2004 nov 11 3 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 function table see note 1. note 1. h = high voltage level. l = low voltage level. ordering information input ne switch l off hon type number package temperature range pins package material code 74hc4066n - 40 c to 125 c 14 dip14 plastic sot27-1 74hct4066n - 40 c to 125 c 14 dip14 plastic sot27-1 74hc4066d - 40 c to 125 c 14 so14 plastic sot108-1 74hct4066d - 40 c to 125 c 14 so14 plastic sot108-1 74hc4066db - 40 c to 125 c 14 ssop14 plastic sot337-1 74hct4066db - 40 c to 125 c 14 ssop14 plastic sot337-1 74hc4066pw - 40 c to 125 c 14 tssop14 plastic sot402-1 74hct4066pw - 40 c to 125 c 14 tssop14 plastic sot402-1 74HC4066BQ - 40 c to 125 c 14 dhvqfn14 plastic sot762-1 74hct4066bq - 40 c to 125 c 14 dhvqfn14 plastic sot762-1 pinning pin symbol description 1 1y independent input/output 2 1z independent input/output 3 2z independent input/output 4 2y independent input/output 5 2e enable input (active high) 6 3e enable input (active high) 7 gnd ground (0 v) 8 3y independent input/output 9 3z independent input/output 10 4z independent input/output 11 4y independent input/output 12 4e enable input (active high) 13 1e enable input (active high) 14 v cc supply voltage handbook, halfpage mgr253 4066 1 2 3 4 5 6 7 8 14 13 12 11 10 9 1y 1z 2z 2y 2e 3e gnd 3y 3z 4z 4y 4e 1e v cc fig.1 pin configuration dip14, so14 and (t)ssop14.
2004 nov 11 4 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 001aac116 4066 transparent top view 3e 3z 2e 4z 2y 4y 2z 4e 1z 1e gnd 3y 1y v cc 6 9 5 10 4 11 3 12 2 13 7 8 1 14 terminal 1 index area v cc (1) fig.2 pin configuration dhvqfn14. (1) the die substrate is attached to this pad using conductive die attach material. it can not be used as a supply pin or input. handbook, halfpage mgr254 13 1 1y 2 1z 4 2y 3 2z 8 3y 9 3z 11 4y 10 4z 1e 52e 63e 12 4e fig.3 logic symbol. handbook, halfpage mgr255 13 # 5# 6# 12 # 1 2 4 3 8 9 11 10 handbook, halfpage mgr256 13 # 5# 6# 12 # 1 11 x1 11 x1 11 x1 11 x1 2 4 3 8 9 11 10 fig.4 ieeec logic symbol.
2004 nov 11 5 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 handbook, halfpage mgr257 11 4y 12 4e 4z 10 3z 9 2z 3 1z 2 8 3y 6 3e 4 2y 5 2e 1 1y 13 1e fig.5 functional diagram. handbook, halfpage mgr258 v cc gnd ne nz ny v cc fig.6 schematic diagram (one switch).
2004 nov 11 6 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 recommended operating conditions limiting values in accordance with the absolute maximum rating system (iec 60134); voltages are referenced to gnd (ground = 0 v). notes 1. to avoid drawing v cc current out of pin nz, when switch current flows in pin ny, the voltage drop across the bidirectional switch must not exceed 0.4 v. if the switch current flows into pin nz, no v cc current will flow out of pin ny. in this case there is no limit for the voltage drop across the switch, but the voltages at pins ny and nz may not exceed v cc or gnd. 2. for dip14 packages: above 70 c derate linearly with 12 mw/k. for so14 packages: above 70 c derate linearly with 8 mw/k. for ssop14 and tssop16 packages: above 60 c derate linearly with 5.5 mw/k. for dhvqfn14 packages: above 60 c derate linearly with 4.5 mw/k. symbol parameter conditions 74hc4066 74hct4066 unit min. typ. max. min. typ. max. v cc supply voltage 2.0 5.0 10.0 4.5 5.0 5.5 v v i input voltage gnd - v cc gnd - v cc v v s switch voltage gnd - v cc gnd - v cc v t amb ambient temperature see dc and ac characteristics per device - 40 +25 +85 - 40 +25 +85 c - 40 - +125 - 40 - +125 c t r ,t f input rise and fall times v cc = 2.0 v - 6.0 1000 - 6.0 500 ns v cc = 4.5 v -- 500 --- ns v cc = 6.0 v -- 400 --- ns v cc = 10.0 v -- 250 --- ns symbol parameter conditions min. max. unit v cc supply voltage - 0.5 +11.0 v i ik input diode current v i < - 0.5 v or v i >v cc + 0.5 v - 20 ma i sk switch diode current v s < - 0.5 v or v s >v cc + 0.5 v - 20 ma i s switch current - 0.5v 2004 nov 11 7 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 dc characteristics family 74hc4066 voltages are referenced to gnd (ground = 0 v); v is is the input voltage at pins ny or nz, whichever is assigned as an input; v os is the output voltage at pins ny or nz, whichever is assigned as an output. symbol parameter test conditions min. typ. max. unit other v cc (v) t amb = - 40 c to +85 c ; note 1 v ih high-level input voltage 2.0 1.5 1.2 - v 4.5 3.15 2.4 - v 6.0 4.2 3.2 - v 9.0 6.3 4.7 - v v il low-level input voltage 2.0 - 0.8 0.50 v 4.5 - 2.1 1.35 v 6.0 - 2.8 1.80 v 9.0 - 4.3 2.70 v i li input leakage current v i =v cc or gnd 6.0 -- 1.0 m a 10.0 -- 2.0 m a i s(off) analog switch current off-state per channel; v i =v ih or v il ; v s =v cc - gnd; see fig.7 10.0 -- 1.0 m a i s(on) analog switch current on-state v i =v ih or v il ; v s =v cc - gnd; see fig.8 10.0 -- 1.0 m a i cc quiescent supply current v i =v cc or gnd; v is = gnd or v cc ; v os =v cc or gnd 6.0 -- 20.0 m a 10.0 -- 40.0 m a
2004 nov 11 8 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 note 1. all typical values are measured at t amb =25 c. t amb = - 40 c to +125 c v ih high-level input voltage 2.0 1.5 -- v 4.5 3.15 -- v 6.0 4.2 -- v 9.0 6.3 -- v v il low-level input voltage 2.0 -- 0.50 v 4.5 -- 1.35 v 6.0 -- 1.80 v 9.0 -- 2.70 v i li input leakage current v i =v cc or gnd 6.0 -- 1.0 m a 10.0 -- 2.0 m a i s(off) analog switch current off-state per channel; v i =v ih or v il ; v s =v cc - gnd; see fig.7 10.0 -- 1.0 m a i s(on) analog switch current on-state v i =v ih or v il ; v s =v cc - gnd; see fig.8 10.0 -- 1.0 m a i cc quiescent supply current v i =v cc or gnd; v is = gnd or v cc ; v os =v cc or gnd 6.0 -- 40.0 m a 10.0 -- 80.0 m a symbol parameter test conditions min. typ. max. unit other v cc (v)
2004 nov 11 9 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 family 74hct4066 voltages are referenced to gnd (ground = 0 v); v is is the input voltage at pins ny or nz, whichever is assigned as an input; v os is the output voltage at pins ny or nz, whichever is assigned as an output. note 1. all typical values are measured at t amb =25 c. symbol parameter test conditions min. typ. max. unit other v cc (v) t amb = - 40 c to +85 c ; note 1 v ih high-level input voltage 4.5 to 5.5 2.0 1.6 - v v il low-level input voltage 4.5 to 5.5 - 1.2 0.8 v i li input leakage current v i =v cc or gnd 5.5 -- 1.0 m a i s(off) analog switch current off-state per channel; v i =v ih or v il ; v s =v cc - gnd; see fig.7 5.5 -- 1.0 m a i s(on) analog switch current on-state v i =v ih or v il ; v s =v cc - gnd; see fig.8 5.5 -- 1.0 m a i cc quiescent supply current v i =v cc or gnd; v is = gnd or v cc ; v os =v cc or gnd 4.5 to 5.5 -- 20.0 m a d i cc additional quiescent supply current per input v i =v cc - 2.1 v; other inputs at v cc or gnd 4.5 to 5.5 - 100 450 m a t amb = - 40 c to +125 c v ih high-level input voltage 4.5 to 5.5 2.0 -- v v il low-level input voltage 4.5 to 5.5 -- 0.8 v i li input leakage current v i =v cc or gnd 5.5 -- 1.0 m a i s(off) analog switch current off-state per channel; v i =v ih or v il ; v s =v cc - gnd; see fig.7 10.0 -- 1.0 m a i s(on) analog switch current on-state v i =v ih or v il ; v s =v cc - gnd; see fig.8 10.0 -- 1.0 m a i cc quiescent supply current v i =v cc or gnd; v is = gnd or v cc ; v os =v cc or gnd 4.5 to 5.5 -- 40.0 m a d i cc additional quiescent supply current per input v i =v cc - 2.1 v; other inputs at v cc or gnd 4.5 to 5.5 -- 490 m a
2004 nov 11 10 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 handbook, full pagewidth mgr260 a a ny nz v i = v cc or gnd v o = gnd or v cc low (from enable inputs) gnd fig.7 test circuit for measuring off-state current. handbook, full pagewidth mgr261 a a ny nz v i = v cc or gnd v o (open circuit) high (from enable inputs) gnd fig.8 test circuit for measuring on-state current.
2004 nov 11 11 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 resistance r on for 74hc4066 and 74hct4066 for 74hc4066: v cc = 2.0, 4.5, 6.0 and 9.0 v; for 74hct4066: v cc = 4.5 v; note 1; v is is the input voltage at pins ny or nz, whichever is assigned as an input; see fig.9. notes 1. at supply voltages approaching 2 v, the analog on-resistance switch becomes extremely non-linear. therefore, it is recommended that these devices are being used to transmit digital signals only, when using these supply voltages. 2. all typical values are measured at t amb =25 c. symbol parameter test conditions min. typ. max. unit other i s ( m a) v cc (v) t amb = - 40 c to +85 c ; note 2 r on(peak) on-resistance (peak) v i =v ih or v il ; v is =v cc to gnd 100 2.0 ---w 1000 4.5 - 54 118 w 6.0 - 42 105 w 9.0 - 32 88 w r on(rail) on-resistance (rail) v i =v ih or v il ; v is = gnd 100 2.0 - 80 -w 1000 4.5 - 35 95 w 6.0 - 27 82 w 9.0 - 20 70 w v i =v ih or v il ; v is =v cc 100 2.0 - 100 -w 1000 4.5 - 42 106 w 6.0 - 35 94 w 9.0 - 27 78 w d r on maximum variation of on-resistance between any two channels v i =v ih or v il ; v is =v cc to gnd - 2.0 ---w 4.5 - 5 -w 6.0 - 4 -w 9.0 - 3 -w t amb = - 40 c to +125 c r on(peak) on-resistance (peak) v i =v ih or v il ; v is =v cc to gnd 100 2.0 ---w 1000 4.5 -- 142 w 6.0 -- 126 w 9.0 -- 105 w r on(rail) on-resistance (rail) v i =v ih or v il ; v is = gnd 100 2.0 ---w 1000 4.5 -- 115 w 6.0 -- 100 w 9.0 -- 85 w v i =v ih or v il ; v is =v cc 100 2.0 ---w 1000 4.5 -- 128 w 6.0 -- 113 w 9.0 -- 95 w
2004 nov 11 12 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 handbook, full pagewidth mgr259 v ny nz i s v is = 0 to v cc - gnd high (from enable inputs) gnd fig.9 test circuit for measuring on-resistance (r on ). handbook, halfpage 09 60 10 20 mgr262 30 40 50 1.8 3.6 5.4 7.2 v is (v) r on ( w ) 6 v 9 v v cc = 4.5 v fig.10 typical on-resistance (r on ) as a function of input voltage (v is ). v is =0vtov cc .
2004 nov 11 13 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 ac characteristics type 74hc4066 gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; v is is the input voltage at pins ny or nz, whichever is assigned as an input; v os is the output voltage at pins ny or nz, whichever is assigned as an output. note 1. all typical values are measured at t amb =25 c. symbol parameter test conditions min. typ. max. unit other v cc (v) t amb = - 40 c to +85 c ; note 1 t phl /t plh propagation delay v is to v os r l = ; see fig.19 2.0 - 875ns 4.5 - 315ns 6.0 - 213ns 9.0 - 210ns t pzh /t pzl turn-on time ne to v os r l =1k w ; see figs 20 and 21 2.0 - 36 125 ns 4.5 - 13 25 ns 6.0 - 10 21 ns 9.0 - 816ns t phz /t plz turn-off time ne to v os r l =1k w ; see figs 20 and 21 2.0 - 44 190 ns 4.5 - 16 38 ns 6.0 - 13 33 ns 9.0 - 16 26 ns t amb = - 40 c to +125 c t phl /t plh propagation delay v is to v os r l = ; see fig.19 2.0 -- 90 ns 4.5 -- 18 ns 6.0 -- 15 ns 9.0 -- 12 ns t pzh /t pzl turn-on time ne to v os r l =1k w ; see figs 20 and 21 2.0 -- 150 ns 4.5 -- 30 ns 6.0 -- 26 ns 9.0 -- 20 ns t phz /t plz turn-off time ne to v os r l =1k w ; see figs 20 and 21 2.0 -- 225 ns 4.5 -- 45 ns 6.0 -- 38 ns 9.0 -- 30 ns
2004 nov 11 14 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 type 74hct4066 gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; v is is the input voltage at pins ny or nz, whichever is assigned as an input; v os is the output voltage at pins ny or nz, whichever is assigned as an output. note 1. all typical values are measured at t amb =25 c. 74hc4066 and 74hct4066 at recommended conditions and typical values; gnd = 0 v; t r =t f = 6 ns; v is is the input voltage at pins ny or nz, whichever is assigned as an input; v os is the output voltage at pins ny or nz, whichever is assigned as an output. notes 1. adjust input voltage v is is 0 dbm level (0 db m = 1 mw into 600 w ). 2. adjust input voltage v is is 0 dbm level at v os for 1 mhz (0 db m = 1 mw into 50 w ). symbol parameter test conditions min. typ. max. unit other v cc (v) t amb = - 40 c to +85 c ; note 1 t phl /t plh propagation delay v is to v os r l = ; see fig.19 4.5 - 315ns t pzh /t pzl turn-on time ne to v os r l =1k w ; see figs 20 and 21 4.5 - 12 30 ns t phz /t plz turn-off time ne to v os r l =1k w ; see figs 20 and 21 4.5 - 20 44 ns t amb = - 40 c to +125 c t phl /t plh propagation delay v is to v os r l = ; see fig.19 4.5 -- 18 ns t pzh /t pzl turn-on time ne to v os r l =1k w ; see figs 20 and 21 4.5 -- 36 ns t phz /t plz turn-off time ne to v os r l =1k w ; see figs 20 and 21 4.5 -- 53 ns symbol parameter conditions typ. unit other v is(p-p) (v) v cc (v) d sin sine wave distortion f = 1 khz; r l =10k w ; c l =50pf; see fig.17 4.0 4.5 0.04 % 8.0 9.0 0.02 % f = 10 khz; r l =10k w ;c l =50pf; see fig.17 4.0 4.5 0.12 % 8.0 9.0 0.06 % a off(feedthr) switch off signal feed-through r l = 600 w ; c l = 50 pf; f = 1 mhz; see figs 11 and 18 note 1 4.5 - 50 db 9.0 - 50 db a ct(s) crosstalk between any two switches r l = 600 w ; c l = 50 pf; f = 1 mhz; see fig.13 note 1 4.5 - 60 db 9.0 - 60 db v ct(p-p) crosstalk voltage between any input to any switch (peak-to-peak value) r l = 600 w ; c l = 50 pf; f = 1 mhz; see fig.15 (ne, square wave between v cc and gnd, t r =t f = 6 ns) - 4.5 110 mv 9.0 220 mv f max minimum frequency response ( - 3 db) r l =50 w ;c l = 10 pf; see figs 12 and 16 note 2 4.5 180 mhz 9.0 200 mhz c s maximum switch capacitance -- 8pf
2004 nov 11 15 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 handbook, full pagewidth - 100 0 - 80 - 60 - 40 - 20 mgr263 10 10 2 10 3 10 4 10 5 10 6 (db) f (khz) fig.11 typical switch off signal feed-through as a function of frequency. test conditions: v cc = 4.5 v; gnd = 0 v; r l =50 w ; r source =1k w . handbook, full pagewidth - 5 5 0 mgr264 10 10 2 10 3 10 4 10 5 10 6 (db) f (khz) fig.12 typical frequency response. test conditions: v cc = 4.5 v; gnd = 0 v; r l =50 w ; r source =1k w .
2004 nov 11 16 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 handbook, full pagewidth 0.1 m f 2r l 2r l r l v cc v i c l nz/ny ny/nz gnd channel on mgr265 fig.13 test circuit for measuring crosstalk between any two switches; channels on condition. handbook, full pagewidth 2r l 2r l 2r l v os v cc 2r l v cc c l db nz/ny ny/nz gnd mgr266 channel off fig.14 test circuit for measuring crosstalk between any two switches; channels off condition.
2004 nov 11 17 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 handbook, full pagewidth d.u.t. 2r l 2r l 2r l v os v cc 2r l v cc v cc gnd c l oscilloscope nz/ny ny/nz gnd mgr268 ne f page mgr267 v ct(p-p) fig.15 test circuit for measuring crosstalk between control and any switch. the crosstalk is defined as follows (oscilloscope output). handbook, full pagewidth 0.1 m f 2r l 2r l v os v cc v is c l db nz/ny ny/nz gnd mgr269 sine-wave channel on fig.16 test circuit for measuring minimum frequency response. adjust input voltage to obtain 0 db at v os when f i = 1 mhz. after set-up, the frequency of f i is increased to obtain a reading of -3 db at v os .
2004 nov 11 18 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 handbook, full pagewidth mgr270 10 m f 2r l 2r l v os v cc v is c l distortion meter nz/ny ny/nz gnd f i = 1 khz sine-wave channel on fig.17 test circuit for measuring sine wave distortion. handbook, full pagewidth 0.1 m f 2r l 2r l v os v cc v is c l db nz/ny ny/nz gnd channel off mgr271 fig.18 test circuit for measuring switch off signal feed-through.
2004 nov 11 19 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 ac waveforms handbook, full pagewidth mgr272 v os 50% v is t r t f t plh t phl gnd v cc 90% 50% 10% fig.19 waveforms showing the input (v is ) to output (v os ) propagation delays. mga846 t plz t pzl v m outputs disabled outputs enabled t pzh 90 % t phz 10 % 90 % t r t f outputs enabled ne input output low - to - off off - to - low output high - to - off off - to - high 50 % 50 % 10 % fig.20 waveforms showing the turn-on and turn-off times. 74hc4066: v m = 50 %; v i = gnd to v cc . 74hct4066: v m = 1.3 v; v i = gnd to 3 v.
2004 nov 11 20 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 test circuit and waveforms handbook, full pagewidth open gnd r l v is v cc v i v o mgr273 d.u.t. c l r t pulse generator v cc switch fig.21 test circuit for measuring ac performance. test switch v is t pzh gnd v cc t pzl v cc gnd t phz gnd v cc t plz v cc gnd other open pulse definitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. t f = 6 ns; when measuring f max , there is no constraint to t r and t f with 50 % duty factor. handbook, full pagewidth mgr274 t thl (t f )t tlh (t r ) v m t w positive input pulse negative input pulse 0 v amplitude 90% 10% t tlh (t r )t thl (t f ) v m t w 0 v amplitude 90% 10% fig.22 input pulse definitions. family amplitude v m t r and t f f max ; pulse width other 74hc4066 v cc 50 % < 2ns 6ns 74hct4066 3.0 v 1.3 v < 2ns 6ns
2004 nov 11 21 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 package outlines unit a max. 1 2 (1) (1) b 1 cd (1) z ee m h l references outline version european projection issue date iec jedec jeita mm inches dimensions (inch dimensions are derived from the original mm dimensions) sot27-1 99-12-27 03-02-13 a min. a max. b max. w m e e 1 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 2.2 4.2 0.51 3.2 0.068 0.044 0.021 0.015 0.77 0.73 0.014 0.009 0.26 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.087 0.17 0.02 0.13 050g04 mo-001 sc-501-14 m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 14 1 8 7 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. dip14: plastic dual in-line package; 14 leads (300 mil) sot27-1
2004 nov 11 22 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot108-1 x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 7 8 1 14 y 076e06 ms-012 pin 1 index 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.35 0.34 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 99-12-27 03-02-19 0 2.5 5 mm scale so14: plastic small outline package; 14 leads; body width 3.9 mm sot108-1
2004 nov 11 23 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 0.2 7.9 7.6 1.03 0.63 0.9 0.7 1.4 0.9 8 0 o o 0.13 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot337-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 7 14 8 q a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop14: plastic shrink small outline package; 14 leads; body width 5.3 mm sot337-1 a max. 2
2004 nov 11 24 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.72 0.38 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot402-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 17 14 8 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm sot402-1 a max. 1.1 pin 1 index
2004 nov 11 25 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.1 2.9 d h 1.65 1.35 y 1 2.6 2.4 1.15 0.85 e 1 2 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot762-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot762-1 dhvqfn14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 26 13 9 8 7 1 14 x d e c b a 02-10-17 03-01-27 terminal 1 index area a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
2004 nov 11 26 philips semiconductors product speci?cation quad bilateral switches 74hc4066; 74hct4066 data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
? koninklijke philips electronics n.v. 2004 sca76 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands r44/05/pp 27 date of release: 2004 nov 11 document order number: 9397 750 14188

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